# 65691 – ontrol problemFrom the step response of an industrial

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ontrol problemFrom the step response of an industrial plant, identify a first-order plus dead time modelG(s) =mt s+1e􀀀Ls:Then, using the model G(s), design a feedback compensator that satisfies the following criteria1. gain crossover frequency wc 0:5t ;2. phase margin fm 60o;3. given a step reference signal, the tracking error is zero;4. given a ramp reference signal with slope R, the tracking error satisfies er 3t R;5. the closed-loop system attenuates of at least 11000 a measurement noise at frequencies wd 1000:5t .1 IdentificationUse Matlab and the file systems generator.p obtain the unit step response of the plant as[y,t]=systems generator(N)where N is your student number. Please ensure that you use the correct student number. From thestep response identify the parameters m, L and t. (hint: find m imposing the dc-gain, then find L as thetime when the response of the real systems reaches 20% of the steady-state and finally find t imposingthat the response of G(s) matches the one of the plant at 63% of the steady state; see also Example 4 of“delay and higher order.pdf” from Lecture 4). Verify your model by plotting on the same figure the stepresponse obtained from systems generator and the unit step response of G(s).2 Integral controllerUsing G(s) with the parameters identified in the previous step, design a controllerC(s) =ks1that satisfies condition 1). (Hint: find k imposing that wc = 0:5t ). Show that condition 2) is not satisfied.Show that the conditions 3) and 4) are satisfied.3 PI controllerUsing G(s) with the parameters identified in the first step, design a controllerC(s) =k(t1s+1)sthat satisfies conditions 1) and 2). (Hint: find t1 such that condition 2 is satisfied, and then find k imposingthat wc = 0:5t . Always impose conditions with some margin, for example, impose a phase margin larger thanthe bare minimum of 60.) Verify that conditions 3) and 4) are satisfied. Show that condition 5 is not satisfied.4 Filtered PI controllerUsing G(s) with the parameters identified in the first step, design a controllerC(s) =k(t1s+1)(t2s+1)sthat satisfies all conditions. (Hint: use t1 from the previous step, obtained with a sufficiently large phasemargin, find t2 such that condition 5 is satisfied, and then find k imposing that wc = 0:5t . Show that allconditions are satisfied.To verify your final design, using the transfer function G(s) obtained identified in step 1• plot the closed-loop unit step response;• plot the error in response to a unit ramp input;• plot the closed-loop response to a sinusoid with angular frequency wc;• show the Bode (or margin) plot of the loop-gain transfer function L(s) to show that the requiredcrossover frequency and phase margin have been achieved;• verify that the magnitude of the frequency response of the closed-loop transfer function at 1000:5t isless than 0:001.2If any of the design criteria cannot be achieved, then get as close as you can and explain where compromiseswere required.

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